Wednesday, 2018-01-17

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zhipengdear beloved15:02
NokMikeRWe are gathered here today15:02
zhipeng#startmeeting openstack-cyborg15:03
openstackMeeting started Wed Jan 17 15:03:03 2018 UTC and is due to finish in 60 minutes.  The chair is zhipeng. Information about MeetBot at http://wiki.debian.org/MeetBot.15:03
openstackUseful Commands: #action #agreed #help #info #idea #link #topic #startvote.15:03
*** openstack changes topic to " (Meeting topic: openstack-cyborg)"15:03
openstackThe meeting name has been set to 'openstack_cyborg'15:03
zhipengNokMikeR to welcome you back to the team lol15:03
zhipeng#topic Roll Call15:03
*** openstack changes topic to "Roll Call (Meeting topic: openstack-cyborg)"15:03
NokMikeR:)15:03
NokMikeR#info Mike Rooke, Nokia.15:03
zhipeng#Howard15:03
zhipengshit15:03
zhipeng#info Howard15:03
jkilpatr#info Justin15:04
NokMikeRdont worry you can fix that in post production.15:04
jkilpatrgood morning everyone.15:04
zhipengmorning, evening, half-day struggling everyone15:04
NokMikeRmorning / evening all. Im back, not that I was actualy away, just busy trying to get something installed.15:05
zhipengNokMikeR always great to have you15:06
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VipparthyGood Morning Folks15:06
zhuli#info zhuli15:06
zhulimorning/evening everyone15:08
zhipeng#topic Queens Dev Progress15:09
*** openstack changes topic to "Queens Dev Progress (Meeting topic: openstack-cyborg)"15:09
zhipeng#link https://review.openstack.org/#/q/status:open+project:openstack/cyborg15:09
Li_Liu#info Li_Liu15:09
zhipengglad we finally managed to land lots of patches last week15:09
zhipenglet's comb through the ones we have15:09
zhipeng#info FPGA data modeling15:10
zhipeng#link https://review.openstack.org/52655915:10
Li_LiuI have just submitted a patch for zhuli's comments15:10
zhipengzhuli have you reviewed the updated patch ?15:10
zhulireviewing now15:11
zhipengother than zhuli's comment, any other concerns about this spec ?15:11
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zhipengif there are no other concerns, we should land this spec today15:15
zhipeng#action landing fpga data modeling spec today15:15
zhipeng#info zhuli's api/db patch15:15
zhipeng#link https://review.openstack.org/52739615:15
zhipengjkilpatr crushil could either of you guys give a workflow +1 for this patch ?15:16
zhipengcrushil_15:16
jkilpatrI'm still confused, the tox command should run linters but not actual test code.15:17
jkilpatrunless the tox.ini is setup to run actual test code in the linter categories which I don't think it is15:17
zhulililiu, you mean the attributes are constant which will be initialized with deployable object together and do not need further methods to modify?15:18
zhipengLi_Liu per zhuli's question ?15:21
zhipengzhuli could you take a look at jkilpatr's problem ?15:22
Li_LiuZhuli, yes, that's what I meant15:22
Li_Liuthe attributes table should be transparent to users15:24
zhulijkilpatr, tox can support both linters check and unit test according to your command, for instance 'tox -epep8' for linters and 'tox -epy27' for unittest15:25
zhulithe openstack-tox-pep8 and openstack-tox-py27 gerrit jobs run against these two situation15:27
jkilpatrok there we go I'll wf it15:28
jkilpatrunless crushil_ has objections?15:29
zhulijkilpatr, you can see the detail in these links15:31
zhulihttp://logs.openstack.org/96/527396/11/check/openstack-tox-pep8/185864a/job-output.txt.gz#_2018-01-13_18_12_47_97584915:31
zhulihttp://logs.openstack.org/96/527396/11/check/openstack-tox-py27/7cf69da/job-output.txt.gz#_2018-01-13_18_08_40_53380515:31
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zhipeng_#info crushil_'s generic driver15:34
zhipeng_#link https://review.openstack.org/52505715:34
zhipeng_crushil_ any ETA on a full implementation ready for review and landing ?15:34
zhulililiu, ok, I'm ok with this, will help merge the patch if there is no other objections15:34
Li_LiuThanks a lot Zhuli15:35
crushil_zhipeng_, It's almost ready. Need to write accompanying unit tests15:35
crushil_You can start reviewing now15:35
zhipeng_sounds gr8t !15:35
zhipeng_#action land zhuli's pacth today15:36
zhipeng_#action start reviewing crushil_'s generic driver patch15:36
zhipeng_i think what we miss now is the conductor's report functionality to sync up resource info with Placement15:37
zhipeng_jkilpatr could you help on this ?15:37
zhipeng_on the basis of zhuli's patch15:37
VipparthyAlso Zhipeng, Any feedback on Cyborg-Nova Integration Code15:37
jkilpatrzhipeng_, this is on crushil_'s patch?15:38
jkilpatror zhuli's patch?15:38
zhipeng_zhuli's15:38
jkilpatrI'll look at it15:39
zhipeng_something like adding a report.py from nova-compute to cyborg-conductor15:39
zhipeng_with the corresponding modifications15:39
zhipeng_#action jkilpatr to start working on the cyborg-conductor report function15:40
zhipeng_Vipparthy the above mentioned code is about the cyborg-nova integration15:41
zhipeng_Dutch dude are you still around ?15:41
zhipeng_$topic Xilinx SDAccel introduction15:43
zhipeng_#topic Xilinx SDAccel introduction15:44
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zhipeng#topic Xilinx SDAccel introduction15:45
*** openstack changes topic to "Xilinx SDAccel introduction (Meeting topic: openstack-cyborg)"15:45
zhipengSo I'm glad to have Dutch from Xilinx to join our dev team15:45
zhipengDutch the floor is yours sir15:45
zhulidutch welcome15:46
DutchThanks! Hey everyone, I work with the Xilinx SDAccel team on our cloud program. I can help provide any resources or support from Xilinx. Also can help with SDAccel framework in general15:47
DutchWe are still coming up to speed on the Cyborg project but the project looks great and we are happy to get involved15:48
zhipengDutch could you provide some info on SDAccel ?15:49
DutchSure, SDAccel is basically the framework for PCIe attached Xilinx FPGAs. Currently we use two PFs. PF0 is user space for DMA and PF1 is management for ioctls15:50
DutchAre people familiar with the driver at all?15:52
zhipengI think you could give a quick overview :P15:52
DutchHaha, I can't say I have done it over IRC before, this is usually consumed in slides with lots of images15:52
DutchAlso, caution, I am not on the drivers team, so there are times when I don't know all the details15:53
zhipenghaha i know15:53
zhipengmaybe you could drop a link here ?15:53
zhipengfor a good overview slide ?15:54
DutchSure #link https://www.xilinx.com/html_docs/xilinx2017_4/sdaccel_doc/index.html15:54
zhulithanks, that's very helpful15:54
DutchThese are most of the user guides in one place instead of dealing with the PDFs, contents are the same15:55
zhipenggr8t thx!15:55
zhipengare there any support yet in the OpenStack for SDAccel ?15:55
zhipengfor example nova driver ?15:55
DutchThere is also a helpful platform guide UG1164, this is still a PDF15:56
Dutch#link https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_4/ug1164-sdaccel-platform-development.pdf15:56
NokMikeRare there any xilinx parts with an open bitstream? (and tools to program them)?15:57
DutchStill no nova support, our openstack cluster is using pass-through, which as you can image is a serious limitation15:57
DutchThe drivers could be open, but bitstream generation is IP so unlikely we will ever see that open15:59
DutchNokMikeR, what in particular do you want open?16:00
NokMikeRany way to program the device via e.g an arm cpu so the synthesis and routing is done on the board - that way the entry level for the programmer is lower.16:00
DutchFor drivers and runtime, absolutely. For synthesis and P&R, I am less sure.16:03
DutchI am also not sure what "done on the board" means16:04
NokMikeRpcie board with fpga + additional cpu to generate the bitstream. you send that vhdl/verilog, "other code" and it all magically works :)16:04
NokMikeRself contained basically. no reliance on vivado etc.16:05
NokMikeRanyhow we are offtopic here, so Howard please carry on :)16:06
zhipengno this is actually an interesting topic :P16:06
DutchIt is nice to think about but yeah, I would say that is a ways off16:06
zhipengNokMikeR I know there are open source bitstream FPGA cards, but not sure if it is production level16:07
DutchIt might be possible to run Vivado on the add-in-card but as far as Vivado being open that seems very unlikely16:07
DutchI would push the currently open project to do something like this16:08
zhipengDutch so coming back to SDAccel, the software defined here refering to ?16:08
DutchSDAccell was initially built to support OpenCL memory model, and there is also support for OpenCL kernel code16:09
Dutchbut it has advanced some to support iteration of HLS C and RTL IP16:09
zhipenggot it16:10
DutchIt was designed to be flexible so that it would support future models, MPI for example16:10
zhipengfolks thx very much for the gr8t discussion today, i'm afraid I have to close the meeting now16:11
zhipengplease go help reviewing the patch or drafting one, we have two weeks left before Queens code freeze16:11
zhipengso let's squeeze in as many stuff as we could :)16:12
NokMikeRwas the devstack bug report about the permissions for cyborg solved?16:12
zhipengyes NokMikeR16:13
NokMikeRGreat :)16:13
zhipengokey meeting adjourned16:14
zhipeng#endmeeting16:14
*** openstack changes topic to "#openstack-cyborg"16:14
openstackMeeting ended Wed Jan 17 16:14:13 2018 UTC.  Information about MeetBot at http://wiki.debian.org/MeetBot . (v 0.1.4)16:14
openstackMinutes:        http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.html16:14
openstackMinutes (text): http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.txt16:14
openstackLog:            http://eavesdrop.openstack.org/meetings/openstack_cyborg/2018/openstack_cyborg.2018-01-17-15.03.log.html16:14
VipparthyThank you folks16:14
NokMikeRThanks all, bye16:14
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DutchThanks!16:15
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guhcamposHi folks, a quick question: I may need to implement our driver for cyborg. Is there a way to write it as a plugin? Like a separate python package that can be installed alongside cyborg? Or do I have to add it to cyborg's tree alongside the generic driver?17:51
crushil_guhcampos, Add it to Cyborg's tree alongside the generic driver17:54
guhcamposcrushil_, thanks. I needed this confirmation to pressure management to sign the contributor agreement17:55
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-openstackstatus- NOTICE: Zuul will be offline for a few minutes; existing changes will be re-enqueued; approvals during the downtime will need to be re-added.20:38
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